375.4.3 Moving and Editing Split Plane Vertices. 37ĥ.4.1 Defining an Internal Power Plane. 284.5.2 Resolving Netlist Loading Errors.

24Ĥ Transferring Design Information to the PCB. 232.7.1 Exercises Exploring the Document Options. 182.3.7 Exercises Exploring the Preferences. All other brand or product names are trademarks oftheir respective owners.Ĭontents1 PCB Design Process. PostScript is a registered trademarkof Adobe Systems, Inc. HP-GL is a registeredtrademark of Hewlett Packard Corporation. Orcad, Orcad Capture, Orcad Layout andSPECCTRA are registered trademarks of Cadence Design Systems Inc.AutoCAD is a registered trademark of AutoDesk Inc. Microsoft, Microsoft Windows and Microsoft Access are registered trademarksof Microsoft Corporation.

Design Explorer, SmartDoc, SmartTool, and SmartTeam and theirlogos are trademarks of Protel International Limited. Protel and the Protel logo are registered trademarks of Protel InternationalLimited. Unauthorized duplication of this work may also be prohibited by local statute.Violators may be subject to both criminal and civil penalties, including finesand/or imprisonment. Unauthorized duplication of the software, manual or relatedmaterials by any means, mechanical or electronic, including translation intoanother language, except for brief excerpts in published reviews, is prohibitedwithout the express written permissions of Protel International Limited. Software, documentation and related materials:Ĭopyright 2001 Protel International Limited.Īll rights reserved.

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